As author R. Jacob “Jake” Baker points out in the preface to this comprehensive volume, CMOS technology has dominated the fabrication of ICs for 25 years, and is likely to dominate it for another 25 ...

A layout-dependent circuit-design model from Toshiba helps boost gate density and improve cost-performance in next-generation 45-nm CMOS technology. More specifically, 45-nm CMOS gate density can be 2 ...

Editor’s note: I am pleased to bring you an important technical blog by Fernando Lavalle, a Ph.D. student at Texas A&M University and his colleague, Suraj Prakash, who have been working and studying ...

Ireland-based IC Mask Design is offering a range of training courses on IC layout aimed at all levels of expertise which focus on the development of physical design skills. The ‘Master-IC’ courses, ...

MEMS-based component suppliers want to rapidly ramp their designs into high-volume production. This demand is driving MEMS suppliers to focus on ways to more efficiently re-use established process ...

The three-transistor design or 3T Pixel is the simplest CMOS pixel architecture (Figure 1). One transistor is used to reset or precharge the photodiode while two more are used for video readout: one ...

A new technical paper titled “Efficient and Scalable Post-Layout Optimization for Field-coupled Nanotechnologies” was published by researcher at the Technical University of Munich (TUM). “As ...